QEDA Documentation

Back to main site

GitHub

Table of Contents

Chip array

To be written.

1. Getting started
2. QEDA Core

2.1. Command-line utility
2.2. Component description
2.3. Styling
2.4. Advanced customization

3. QEDA Library
4. List of supported schematic symbols

4.1. Capacitor
4.2. Connector
4.3. Crystal
4.4. Diode
4.5. FET (Field-Effect Transistor)
4.6. Fuse
4.7. IC (Integrated Circuit)
4.8. Inductor
4.9. LED (Light-Emitting Diode)
4.10. Mounting Hole
4.11. Pushbutton
4.12. Resistor
4.13. Test-point
4.14. Transformer
4.15. Transistor
4.16. Twin Diode

5. List of supported land patterns

5.1. BGA (Ball Grid Array)
5.2. CAE (Capacitor, Aluminum Electrolytic)
5.3. CFP (Ceramic Flat Package)
5.4. CGA (Column Grid Array)
5.5. Chip array
5.6. Chip
5.7. CQFP (Ceramic Quad Flat Package)
5.8. Crystal
5.9. Custom
5.10. DIP (Dual In-line Package)
5.11. LGA (Land Grid Array)
5.12. MELF (Metal Electrode Leadless Face)
5.13. Molded
5.14. Mounting hole
5.15. Oscillator
5.16. PAK (DPAK, D2PAK)
5.17. QFN (Quad Flat No-lead)
5.18. QFP (Quad Flat Package)
5.19. Radial
5.20. SOD (Small Outline Diode)
5.21. SODFL (Small Outline Diode, Flat Lead)
5.22. SOIC (Small Outline Integrated Circuit)
5.23. SOJ (Small Outline J-lead)
5.24. SOL (Small Outline L-lead)
5.25. SON (Small Outline No-lead)
5.26. SOP (Small Outline Package)
5.27. SOT143 (Small Outline Transistor)
5.28. SOT223 (Small Outline Transistor)
5.29. Test point